Modern microprocessor and peripheral devices are often dependant on synchronization of various timing signals. One such standard used in peripheral devices is the Universal Serial Bus (USB), which has a variety of operating modes that allow a number of computer peripherals to be connected to a generic port. Implementation of a universal serial bus device involves a variety of design considerations including synchronizing data. Conventional USB designs may implement a phase lock loop (PLL) for synchronizing timing relationships. However, a PLL is generally complex and may require a relatively large area to implement or use components not shared with other circuits. A PLL is typically a reactive device and generally relies on feedback to synchronize incoming data. The feedback mechanism typically limits design adjustment capabilities. Without an additional voltage controlled oscillator, a PLL is limited to providing phase adjustments, rather than frequency adjustments.
A digitally controlled oscillator (DCO) is a conventional circuit for generating specific frequencies. A DCO may have a fine input F and a coarse input C (see e.g., DCO 30 in FIG. 2) which may be used to provide a variety of frequency adjustments based on external signals received at the inputs. The coarse frequency input generally controls the general range of the frequency, while the fine input F is used for more precise control. While DCOs are useful for generating an output frequency in response to the fine and coarse inputs, it is desirable to provide a system that provides a stable DCO to an output that is synchronized with respect to an external periodic signal.